XC5VLX220-2FF1760I

Platform Flash, In-System, Programmable Configuration PROMS, FBGA, Low-Power, 3.3V supply voltage

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PartNumber:: XC5VLX220-2FF1760I

Brand:: Xilinx, Inc - Xilinx | Pack: DIP | D/C: 09+

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Products Upload time: 2011-11-12

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Product Summary

Xilinx introduces the Platform Flash series of in-system programmable configuration PROMs. Available in 1 to 32 Megabit (Mbit)densities, the XC5VLX220-2FF1760I provides an easy-to-use, cost-effective, and reprogrammable method for storing large Xilinx FPGA configuration bitstreams. The Platform Flash PROM series includes both the 3.3V XCFxxS PROM and the 1.8V XCFxxP PROM. The XC5VLX220-2FF1760I version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that support Master Serial and Slave Serial FPGA configuration modes (Figure 1, page 2). The XC5VLX220-2FF1760I version includes 32-Mbit, 16-Mbit, and 8-Mbit PROMs that support Master Serial, Slave Serial, Master SelectMAP, and Slave SelectMAP FPGA configuration modes.

Parametrics

XC5VLX220-2FF1760I absolute maximum ratings: (1)VCCINT Internal supply voltage relative to GND: -0.5 to +4.0, -0.5 to +2.7 V; (2)VCCO I/O supply voltage relative to GND: -0.5 to +4.0, -0.5 to +4.0 V; (3)VCCJ JTAG I/O supply voltage relative to GND: -0.5 to +4.0, -0.5 to +4.0 V; (4)VIN Input voltage with respect to GND: VCCO < 2.5V -0.5 to +3.6, -0.5 to +3.6 V; VCCO ≥ 2.5V: -0.5 to +5.5, -0.5 to +3.6 V; (5)VTS Voltage applied to High-Z output VCCO < 2.5V: -0.5 to +3.6, -0.5 to +3.6 V; VCCO ≥ 2.5V: -0.5 to +5.5, -0.5 to +3.6 V; (6)TSTG Storage temperature (ambient): -65 to +150, -65 to +150 ℃; (7)TJ Junction temperature: +125 +125 ℃.

Features

XC5VLX220-2FF1760I features: (1)In-System Programmable PROMs for Configuration of Xilinx FPGAs; (2)Low-Power Advanced CMOS NOR FLASH Process; (3)Endurance of 20,000 Program/Erase Cycles; (4)Operation over Full Industrial Temperature Range: (-40℃ to +85℃); (5)IEEE Standard 1149.1/1532 Boundary-Scan (JTAG) Support for Programming, Prototyping, and Testing; (6)JTAG Command Initiation of Standard FPGA Configuration; (7)Cascadable for Storing Longer or Multiple Bitstreams; (8)Dedicated Boundary-Scan (JTAG) I/O Power Supply (VCCJ); (9)I/O Pins Compatible with Voltage Levels Ranging From 1.5V to 3.3V; (10)Design Support Using the Xilinx Alliance ISE and Foundation ISE Series Software Packages.